Abstraction refinement and plan revision for control synthesis under high level specifications

This paper presents a novel framework combining abstraction refinement and plan revision for control synthesis problems under temporal logic specifications. The control problem is first solved on a simpler nominal model in order to obtain a satisfying plan to be followed by the real system. A controller synthesis is then attempted for an abstraction of the real system to follow this plan. Upon failure of this synthesis, cost functions are defined to guide towards either refining the initially coarse partition to obtain a finer abstraction, or looking for an alternative plan using the nominal model as above. This tentative synthesis is then repeated until a plan and an abstraction of the real system able to follow this plan are found. The obtained controller also ensures that the real system satisfies the initial specification.Qc 20170810