A novel design method for phase-locked loops of any order and type

In this paper a novel approach to the design of PLLs is presented, which can be used regardless of their Order and Type. The method stems from the fact that high-frequency poles in the loop filter determine filtering properties of the PLL, while zeropole (at the origin) pairs determine its Type and thus the loop control dynamics.This paper has been supported by the DGCYT, Grant DPI2003-08637-C03