Managing the Shape Function of Analog Devices in a Slicing Tree Floorplan

International audienceAnalog Intellectual Property Cores design is still under study [1, 2]. The precharacterized cell libraries concept cannot be applied because the devices (transistors, capacitors, resistors,...) are electrically sized regarding a specific context. Thus, the trend is to develop reusable generators. To guarantee a reusable and fast placement, slicing tree floorplan can be used. Considering a particular electrical sizing and a specific process, the analog devices may occupy a wide range of shapes because of folding. Finding the correct aspect ratio for each device which optimizes the placement under a specific height and/or width constraint may lead to examine a high number of cases. This paper presents a general placement method to manage rectangular objects with varying aspect ratio. This approach allows hierarchical layout-aware electrical sizing of analog circuits