Lithography Hotspot Detection

The lithography process for chip manufacturing has been playing a critical role in keeping Moor\u27s law alive. Even though the wavelength used for the process is bigger than actual device feature size, which makes it difficult to transfer layout patterns from the mask to wafer, lithographers have developed a various technique such as Resolution Enhancement Techniques (RETs), Multi-patterning, and Optical Proximity Correction (OPC) to overcome the sub-wavelength lithography gap. However, as feature size in chip design scales down further to a point where manufacturing constraints must be applied to early design phase before generating physical design layout. Design for Manufacturing (DFM) is not optional anymore these days. In terms of the lithography process, circuit designer should consider making their design as litho-friendly as possible. Lithography hotspot is a place where it is susceptible to have fatal pinching (open circuit) or bridging (short circuit) error due to poor printability of certain patterns in a design layout. To avoid undesirable patterns in layout, it is mandatory to find hotspots in early design stage. One way to find hotspots is to run lithography simulation on a layout. However, lithography simulation is too computationally expensive for full-chip design. Therefore, there have been suggestions such as pattern matching and machine learning (ML) technique for an alternative and practical hotspot detection method. Pattern matching is fast and accurate. Large hotspot pattern library is utilized to find hotspots. Its drawback is that it can not detect hotspots that are unseen before. On contrast, ML is effective to find previously unseen hotspots, but it may produce false positives. This research presents a novel geometric pattern matching methodology using edge driven dissected rectangles and litho award machine learning for hotspot detection. 1. Edge Driven Dissected Rectangles (EDDR) based pattern matching EDDR pattern matching employs member concept inside a pattern bounding box. Unlike the previous pattern matching, the idea proposed in this thesis uses simple Design Rule Check (DRC) operations to create member rectangles for pattern matching. Our approach shows significant speedup against a state-of-art commercial pattern matching tool as well as other methods. Due to its simple DRC edge operation rules, it is flexible for fuzzy pattern match and partial pattern match, which enable us to check previously unseen hotspots as well as the exact pattern match. 2. Litho-aware Machine Learning A new methodology for machine learning (ML)-based hotspot detection harnesses lithography information to build SVM (Support Vector Machine) during its learning process. Unlike the previous research that uses only geometric information or requires a post-OPC (Optical Proximity Correction) mask, our method utilizes detailed optical information but bypasses post-OPC mask by sampling latent image intensity and use those points to train an SVM model. Our lithography-aware machine learning guides learning process using actual lithography information combined with lithography domain knowledge. While the previous works for SVM modeling to identify hotspots have used only geometric related information, which is not directly relevant to the lithographic process, our SVM model was trained with lithographic information which has a direct impact on causing pinching or bridging hotspots. Furthermore, rather than creating a monolithic SVM trying to cover all hotspot patterns, we utilized lithography domain knowledge and separated hotspot types such as HB(Horizontal Bridging), VB (Vertical Bridging), HP(Horizontal Pinching), and VP(Vertical Pinching) for our SVM model. Out results demonstrated high accuracy and low false alarm, and faster runtime compared with methods that require a post-OPC mask. We also showed the importance of lithography domain knowledge to train ML for hotspot detection