Exploiting concurrency in system-on-chip verification

Copyright © 2006 IEEESystem-on-chip (SoC) design paradigm makes design verification a more time-consuming task. Therefore, for simulation-based methods, test quality is extremely important. This paper presents a method that increases the test quality by exploiting the concurrency in a system. The main idea is to generalize the elements of concurrency as transfers and then transform the system into a transfer-resource-graph. The graph can be traversed to produce high-quality tests. To further optimize the test quality in terms of concurrency, we are able to generate event-driven test-programs.Xu, Justin; Cheng-Chew Li