A technique for implementing arbitrary Boolean functions in threshold logic

© 2001 COPYRIGHT SPIE--The International Society for Optical EngineeringThe main result of this paper is the development of a systematic paper-and-pencil design methodology for implementing Boolean functions of up to 4 variables using threshold logic (TL) gates, which does not require linear programming, for the first time. The method is similar in operation to the Karnaugh map logic minimization technique, and is based on determining the minimum threshold cover of a Boolean function. The paper also reviews aspects of TL and discusses aspects of the proposed design methodology when combined with the implementation issues present in neuron-MOS based TL gates. Two circuit design examples using the proposed technique are given.Peter Celinski, Gregory D. Sherman, and Derek Abbot