Programming coarse-grain reconfigurable arrays (CGRAs) is a challenging task. In this work, we exploit the algebraic structure which is often present in the specification of a streaming application to distribute the different parts of a computation over a multi-core architecture. This architecture is dataflow-based, so that the control of the cores coincides with the availability of data on the channels. In this paper, we focus on the compiler, not the architecture. We formulate our work in the functional programming language Haskell since that is close to a mathematical formalism
Nowadays, performance in processors is increased by adding more cores orwider vector units, or by co...
We present a translation from programs expressed in a functional IR into dataflow networks as an int...
Nowadays, performance in processors is increased by adding more cores or wider vector units, or by c...
Programming coarse-grain reconfigurable arrays (CGRAs) is a challenging task. In this work, we explo...
In this paper, we present a new approach towards programming coarse-grained reconfigurable arrays (C...
The herein presented research is motivated by the need for reconfigurable, flexible computing arrays...
Data driven streaming applications are quite common in modern multimedia and wireless applications, ...
We present an embedded language in Haskell for programming pipelined computations. The language is a...
Coarse-Grained Reconfigurable Architectures(CGRAs) can be employed for accelerating computational wo...
In the streaming domain, applications are often described as dataflow graphs. Each node in the graph...
Coarse-Grained Reconfigurable Array (CGRA) architectures accelerate the same inner loops that benefi...
Abstract Coarse-Grained Reconfigurable Array (CGRA) architectures accelerate the same inner loops th...
Coarse-grain reconfigurable arrays often rely on an imperative programming approach including a read...
To provide high performance at practical power levels, tomorrow’s chips will have to consist primari...
Recursive functions and data types pose significant chal-lenges for a Haskell-to-hardware compiler. ...
Nowadays, performance in processors is increased by adding more cores orwider vector units, or by co...
We present a translation from programs expressed in a functional IR into dataflow networks as an int...
Nowadays, performance in processors is increased by adding more cores or wider vector units, or by c...
Programming coarse-grain reconfigurable arrays (CGRAs) is a challenging task. In this work, we explo...
In this paper, we present a new approach towards programming coarse-grained reconfigurable arrays (C...
The herein presented research is motivated by the need for reconfigurable, flexible computing arrays...
Data driven streaming applications are quite common in modern multimedia and wireless applications, ...
We present an embedded language in Haskell for programming pipelined computations. The language is a...
Coarse-Grained Reconfigurable Architectures(CGRAs) can be employed for accelerating computational wo...
In the streaming domain, applications are often described as dataflow graphs. Each node in the graph...
Coarse-Grained Reconfigurable Array (CGRA) architectures accelerate the same inner loops that benefi...
Abstract Coarse-Grained Reconfigurable Array (CGRA) architectures accelerate the same inner loops th...
Coarse-grain reconfigurable arrays often rely on an imperative programming approach including a read...
To provide high performance at practical power levels, tomorrow’s chips will have to consist primari...
Recursive functions and data types pose significant chal-lenges for a Haskell-to-hardware compiler. ...
Nowadays, performance in processors is increased by adding more cores orwider vector units, or by co...
We present a translation from programs expressed in a functional IR into dataflow networks as an int...
Nowadays, performance in processors is increased by adding more cores or wider vector units, or by c...
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