Photodiodes designed in standard CMOS technology which can be monolithically integrated in high-speed optical receivers are analyzed and the advantages and drawbacks concerning bandwidth with respect to the diode geometry and structure, are discussed. Studied photodiode structures that can be realized in standard CMOS technology are:\ud 1) N-well/Psubstrate,\ud 2) lateral N-well/P-substrate (exploiting only depletion region in between)\ud 3) N+/P-substrate and\ud 4) P+/N-well/P-substrate diodes.\ud The maximal operating frequency as well as the impulse response of the diodes are calculated using 2-D model semiconductor device analysis
A high-performance lateral polysilicon photodiode was designed in standard 0.18 um CMOS technology. ...
13301甲第4570号博士(学術)金沢大学博士論文要旨Abstract 以下に掲載:IEICE Transactions on Electronic E99-C pp.1304-1311. IEIC...
This talk discusses the technological challenges arising from the insertion of a Ge photodetectors s...
Photodiodes designed in standard CMOS technology which can be monolithically integrated in high-spee...
The influence of two different geometries (layouts) and two structures of high-speed photodiodes in ...
This thesis describes high-speed photodiodes in standard CMOS technology which allow monolithic inte...
Analyses of the influence of different geometries (layouts) and structures of high-speed CMOS photod...
The influence of different geometries (layouts) and structures of high-speed photodiodes in fully st...
The development of new integrated high-speed Si receivers is requested for short distance optical da...
CMOS photodiodes have been widely reported in microsystem applications. This article presents the de...
This paper presents a monolithic optical detector, consisting of an integrated photodiode and a prea...
This work explores the n-well/p-substrate photodiode in a deep submicron CMOS process. A CMOS chip i...
We have investigated and compared the performance of photodiodes built with stacked p/n junctions op...
A monolithic silicon CMOS optoelectronic integrated circuit (OEIC) was designed and fabricated with ...
AbstractThis work reports on two 40×40μm2 high-speed pnp phototransistors built in a standard 0.18μm...
A high-performance lateral polysilicon photodiode was designed in standard 0.18 um CMOS technology. ...
13301甲第4570号博士(学術)金沢大学博士論文要旨Abstract 以下に掲載:IEICE Transactions on Electronic E99-C pp.1304-1311. IEIC...
This talk discusses the technological challenges arising from the insertion of a Ge photodetectors s...
Photodiodes designed in standard CMOS technology which can be monolithically integrated in high-spee...
The influence of two different geometries (layouts) and two structures of high-speed photodiodes in ...
This thesis describes high-speed photodiodes in standard CMOS technology which allow monolithic inte...
Analyses of the influence of different geometries (layouts) and structures of high-speed CMOS photod...
The influence of different geometries (layouts) and structures of high-speed photodiodes in fully st...
The development of new integrated high-speed Si receivers is requested for short distance optical da...
CMOS photodiodes have been widely reported in microsystem applications. This article presents the de...
This paper presents a monolithic optical detector, consisting of an integrated photodiode and a prea...
This work explores the n-well/p-substrate photodiode in a deep submicron CMOS process. A CMOS chip i...
We have investigated and compared the performance of photodiodes built with stacked p/n junctions op...
A monolithic silicon CMOS optoelectronic integrated circuit (OEIC) was designed and fabricated with ...
AbstractThis work reports on two 40×40μm2 high-speed pnp phototransistors built in a standard 0.18μm...
A high-performance lateral polysilicon photodiode was designed in standard 0.18 um CMOS technology. ...
13301甲第4570号博士(学術)金沢大学博士論文要旨Abstract 以下に掲載:IEICE Transactions on Electronic E99-C pp.1304-1311. IEIC...
This talk discusses the technological challenges arising from the insertion of a Ge photodetectors s...