Compressive Sensing Hardware in 1-D Signals Hardware de compressive sensing en señales 1D

This paper shows the implementation in hardware of signal processing techniques known as compressive censing, compressed sensing, or compressive sampling. The CS technique works in a sparse signal space; the methods used in this article are: derived (D), discrete Fourier transform (DFT), discrete cosine transform (DCT), and discrete wavelet transform (WDT). Additionally, electronic circuits to acquire voice, electromyography, and electrocardiogram signals were implemented. Application of CS in these signals showed significant results, which promise a substantial increase in transmission speed and development of new technologies for communications in the world. Hardware implementation was performed in an FPGA (SPARTAN 3E) and a microcontroller (18F4550 PIC). The results demonstrated that it is possible to reconstruct 1D signals, breaking the Shannon-Nyquist theorem. Also, we conclude that the FPGA implementation is faster and allows higher compression ratios than with the microcontroller