LSI design for MPEG-4 coding system

video coding. We adopt platform-based architecture with an em-bedded RISC core and efficient memory organization. A fast mo-tion estimator architecture supporting predictive diamond search and spiral full search with halfway termination is implemented to make good compromise between compression performance and design cost. Several key modules are integrated into an efficient platform in hardware/software co-design fashion. With high de-gree of optimization in both algorithm and architecture levels, a cost-efficient video encoder LSI is implemented. It consumes 256.8mW at 40MHz and achieves real-time encoding of 30 CIF (352x288) frames per second. I