A UNIFYING FRAMEWORK FOR SYSTOLIC DESIGNS

A systematic methodology to synthesize systolic designs is described and used to derive a new design for dynamic programming. This latter design uses fewer processing elements than previously considered ones. The synthesis method consists of two pans: 1) deriving from the high-level problem specification a form more suitable to VLSI implementation; 2) mapping the new specification into physical hardware. The method also provides a Wlifying framewOIK for existing systolic algorithms. I