A Novel Low-Temperature Polysilicon Thin-Film Transistors With a Self-Aligned Gate and Raised Source/Drain Formed by the Damascene Process

Abstract—In this letter, a novel structure of the polycrystalline silicon thin-film transistors (TFTs) with a self-aligned gate and raised source/drain (RSD) formed by the damascene process has been developed and investigated. Comparing with the conven-tional coplanar TFT, the proposed RSD TFT has a remarkable lower OFF-state current (177 to 6.29 nA), and the ON/OFF current ratio is only slightly decreased from 1.71 × 107 to 1.39 × 107. Only four photomasking steps are required. This novel structure is an excellent candidate for further high-performance large-area device applications. Index Terms—Damascene process, four masks, on/off current ratio, polycrystalline silicon thin-film transistor (poly-Si TFT), raised source/drain (RSD), self-aligned gate, thin channel. I