In this study, the authors investigated an anomalous gate current hump after dynamic negative bias stress (NBS) and negative-bias temperature-instability (NBTI) in HfxZr1−xO2 and HfO2/metal gate p-channel metal-oxide-semiconductor field-effect transistors. This result is attributed to hole trapping in high-k bulk. Measuring gate current under initial through body floating and source/drain floating conditions indicates that holes flow from source/drain to gate. The fitting of the gate current-gate voltage characteristic curve demonstrates that Frenkel-Poole mechanism dominates the conduction under initial. Next, fitting the gate current after dynamic NBS and NBTI indicates Frenkel-Poole then tunneling mechanisms, finally returning to the Fre...
Abstract—Negative bias temperature instability is studied in thick and thin gate oxide p-MOSFETs. Th...
none6siHere we study the origin of the gate bias-stress effect in organic p-type transistors. Based ...
The effect of a low stress voltage on the negative bias temperature instability degradation in a nan...
This Letter investigates a hump in gate current after negative-bias temperature-instability (NBTI) i...
Under a given stress field, the recoverable component (R) for HfO2 p-MOSFET appears almost constant ...
Gate dielectric traps are becoming a major concern in the high-k/metal gate devices. In this paper, ...
Gate dielectric traps are becoming a major concern in the high-k/metal gate devices. In this paper, ...
"Increased power dissipation is one of the major issue for today’s chip designers. Gate leakage acro...
The negative-bias temperature instability (NBTI) characteristics of HfN/HfO2 gated p-MOSFET with equ...
Electron detrapping in the TiN/HfO2 gate n-MOSFET under dynamic positive-bias temperature instabilit...
This letter investigates extra traps measured by charge pumping technique in the high voltage zone i...
Negative Bias Temperature Instability (NBTI) is a critical reliability issue of metal-oxide-semicond...
The impact of the gate insulator process on interlayer (IL) hole traps in IL/high-K dual-layer p-MOS...
The impact of the gate insulator process on Interlayer (IL) hole traps in IL/high-K dual-layer p-MOS...
In this paper, we present the results of an experimental analysis of the degradation induced by nega...
Abstract—Negative bias temperature instability is studied in thick and thin gate oxide p-MOSFETs. Th...
none6siHere we study the origin of the gate bias-stress effect in organic p-type transistors. Based ...
The effect of a low stress voltage on the negative bias temperature instability degradation in a nan...
This Letter investigates a hump in gate current after negative-bias temperature-instability (NBTI) i...
Under a given stress field, the recoverable component (R) for HfO2 p-MOSFET appears almost constant ...
Gate dielectric traps are becoming a major concern in the high-k/metal gate devices. In this paper, ...
Gate dielectric traps are becoming a major concern in the high-k/metal gate devices. In this paper, ...
"Increased power dissipation is one of the major issue for today’s chip designers. Gate leakage acro...
The negative-bias temperature instability (NBTI) characteristics of HfN/HfO2 gated p-MOSFET with equ...
Electron detrapping in the TiN/HfO2 gate n-MOSFET under dynamic positive-bias temperature instabilit...
This letter investigates extra traps measured by charge pumping technique in the high voltage zone i...
Negative Bias Temperature Instability (NBTI) is a critical reliability issue of metal-oxide-semicond...
The impact of the gate insulator process on interlayer (IL) hole traps in IL/high-K dual-layer p-MOS...
The impact of the gate insulator process on Interlayer (IL) hole traps in IL/high-K dual-layer p-MOS...
In this paper, we present the results of an experimental analysis of the degradation induced by nega...
Abstract—Negative bias temperature instability is studied in thick and thin gate oxide p-MOSFETs. Th...
none6siHere we study the origin of the gate bias-stress effect in organic p-type transistors. Based ...
The effect of a low stress voltage on the negative bias temperature instability degradation in a nan...