Design of a Bipolar Rail-to-Rail Operational Amplifier By

This thesis details the design and simulation of a low-voltage, low-power rail-to-rail input and output high speed operational amplifier. Various input and output structures from the literature are analyzed. Intermediate stage concerns, compensation, current distribution, and power supply, common-mode voltage, and temperature variations are addressed. Considerable time is spent analyzing various Class AB bias-control schemes. The final amplifier settles to 0.1 % in 90ns, has an 80 V/ps slew rate, and a 200 MIHz unity gain bandwidth, while using only 2.3mW from a 2.5 V supply