Master’s Examination Committee: Dr. Fusun Ozguner, Advisor

Worst case execution time (WCET) analysis is used to verify that real-time tasks on systems can be executed without violating any timing constraints. Power con-sumption is not considered in most of the WCET research work. However, real-time embedded systems have limited power resource and leakage power cost by cache could take up to 40 % of the total power consumption. Because of the data reuse in pro-grams, not all of the cache are needed during the execution. However, traditional WCET analysis, which obtain WCET bound by assuming all cache can be utilized, results in a higher power dissipation. In this thesis, we propose a Power-aware WCET analysis framework (PWCET) to improve energy efficiency by reducing cache size with no penalty on WCET re-sult. Compiler analysis based useful cache calculation algorithm is used to determine non-useful cache size to be turned off to save power. Experiments of benchmarks demonstrate the effectiveness of the PWCET framework by obtaining considerable power saving without any effect on WCET bounds. ii This is dedicated to my parents. iii Acknowledgments First of all, I would like to express my gratitude to my advisor Dr. Fusun Ozguner for her advice and support on my work. Her insightful comments and guidance have inspired me to do research high performance computing and embedded system areas. My gratitude also goes to Dr. Saday for his discussion, comments and help on my research topics. No words can express my sincere gratitude and appreciation to my parents for their support in my life. i