Abstract—In partially reconfigurable architectures, system components can be dynamically loaded and unloaded allowing resources to be shared over time. This paper focuses on the relation between the design options of partial reconfiguration modules and their placement at run-time. For a set of dynamic system components, we propose a design method that optimizes the feasible positions of the resulting partial reconfiguration modules to minimize position overlaps. We introduce the concept of subregions, which guarantees the parallel execution of a certain number of partial reconfiguration modules for tiled reconfigurable systems. Experimental results, which are based on a Xilinx Virtex-4 implementation, show that at run-time the average numbe...
This is the first book to focus on designing run-time reconfigurable systems on FPGAs, in order to g...
Modern field programmable gate array(FPGA) can be partially dynamically reconfigurable with heteroge...
Runtime reconfigurable systems built upon devices with partial reconfiguration can provide reduction...
Koester M, Luk W, Hagemeyer J, Porrmann M. Design Optimizations to Improve Placeability of Partial R...
Koester M, Luk W, Hagemeyer J, Porrmann M, Rückert U. Design Optimizations for Tiled Partially Recon...
Koester M, Porrmann M, Rückert U. Placement-Oriented Modeling of Partially Reconfigurable Architectu...
We describe algorithmic results for two crucial aspects of allocating resources on computational har...
Kalte H, Kettelhoit B, Koester M, Porrmann M, Rückert U. A System Approach for Partially Reconfigura...
Koester M, Kalte H, Porrmann M. Task Placement for Heterogeneous Reconfigurable Architectures. In: I...
The aim of this article is to describe a complete partitioning and floorplanning algorithm tailored ...
We present a simple model for specifying and optimising designs which contain elements that can be r...
Xilinx Virtex FPGAs offer the possibility of dynamic and partial run-time reconfiguration. This feat...
Partial reconfiguration (PR) reveals many opportunities for integration into FPGA design for potenti...
Many reconfigurable architectures offer partial dynamic configura-bility, but current system-level t...
Reconfigurable systems have been shown to achieve very high computational performance. However, the ...
This is the first book to focus on designing run-time reconfigurable systems on FPGAs, in order to g...
Modern field programmable gate array(FPGA) can be partially dynamically reconfigurable with heteroge...
Runtime reconfigurable systems built upon devices with partial reconfiguration can provide reduction...
Koester M, Luk W, Hagemeyer J, Porrmann M. Design Optimizations to Improve Placeability of Partial R...
Koester M, Luk W, Hagemeyer J, Porrmann M, Rückert U. Design Optimizations for Tiled Partially Recon...
Koester M, Porrmann M, Rückert U. Placement-Oriented Modeling of Partially Reconfigurable Architectu...
We describe algorithmic results for two crucial aspects of allocating resources on computational har...
Kalte H, Kettelhoit B, Koester M, Porrmann M, Rückert U. A System Approach for Partially Reconfigura...
Koester M, Kalte H, Porrmann M. Task Placement for Heterogeneous Reconfigurable Architectures. In: I...
The aim of this article is to describe a complete partitioning and floorplanning algorithm tailored ...
We present a simple model for specifying and optimising designs which contain elements that can be r...
Xilinx Virtex FPGAs offer the possibility of dynamic and partial run-time reconfiguration. This feat...
Partial reconfiguration (PR) reveals many opportunities for integration into FPGA design for potenti...
Many reconfigurable architectures offer partial dynamic configura-bility, but current system-level t...
Reconfigurable systems have been shown to achieve very high computational performance. However, the ...
This is the first book to focus on designing run-time reconfigurable systems on FPGAs, in order to g...
Modern field programmable gate array(FPGA) can be partially dynamically reconfigurable with heteroge...
Runtime reconfigurable systems built upon devices with partial reconfiguration can provide reduction...