Optimizing a Reed-Solomon Decoder for the Texas Instruments TMS320C62x DSP

Reed-Solomon is a family of block forward-error-correction codes used to facilitate robust digital communications. Reed-Solomon codes are used in many communications and storage/retrieval systems today, including the compact disc, satellites, space probes, cellular digital, asymmetric digital subscriber loops, and digital television. Reed-Solomon decoding is a computationally intense process which is generally implemented on application-specific integrated circuits (ASIC's). ASIC's provide high performance, but they are difficult and expensive to design. Digital signal processors (DSP's) provide a friendlier and more economical development platform, but they are generally slower than ASIC's. Texas Instruments recently introduced the fastest digital signal processors to date: the TMS320C62x (C62x) line. The C62x was designed for high-performance telecommunications applications. It offers an advanced instruction set architecture and powerful, user-friendly development tools. The C62x can potentially implement high-throughput Reed-Solomon decoding. This project is a series of C62x-specific optimizations of an existing C-language Reed-Solomon decoder. The goal was to improve the decode