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I I SUPP:.EMENTAR Y NOTES The Views expressed in this thesis are those of the author and do not refkct the offic ia l PQllcy or pusition of the Depanment of Defense or the U S, Government Approved forpubhc re lease, distribution is un limited I3 ABSTRACT (m(uimum.WO,. · ~rris) The goal of this research project was to design a VLSI implementation of the required digital circuitry to utililC ferroelecu;c memury as a portion of main microprocessor memory. An interface b ~tween. National Semiconductor's NM24Cf04, a nunvolatile, serial-access, lcrroekctric memory de \ ice. and In ters 8086 microprocessor was designed and implemented using SSIIMSI technology III a previous study. ThiS thesis diSClisses the redesign of the previously designed circuit for VLSI implemcntation The layout was accomplished usmg the Magic graphical layout editor and tes ted us ing the Esim event dnven logic-level simulator 14 SIJBJECT TERMS Fe rroelectric m~lIlor)', FERRAM,NM24CF04,nonvolat1lc memory.VLS