OF PSK BURST MODEMS

A high performance Universal Modem ASIC that supports sev-eral modulation types and burst mode frame formats is under development. The ASIC is designed to work under stringent conditions such as large carrier frequency offset (up to 13% symbol rate) and low signal-to-noise ratio (SNR). Powerful and generic data-aided (DA) parameter estimators are necessary to accommodate many modes. In this paper we present an ap-proximated maximum likelihood (ML) carrier frequency off-set estimator, ML joint carrier phase and timing offsets esti-mator and their systolic VLSI implementations for PSK burst modems. The performances are close to the Cramer-Rao lower bounds (CRLB) at low SNRs. Compared with theoretical solu-tions the estimators proposed here are much simpler and easier to implement by the current VLSI technology. 1