system transmitter and receiver with 4-channel 10 Gb/s interface is presented. InP DHBT IC technology is used to implement the complete chipset ( 4:1 multiplexer with VCO /clock multiplication unit, modulator driver, transimpedance amplifier, limiting amplifier and 1:4 demultiplexer with clock and data recovery). A 2.26 km long transmission experiment was performed using the system with 40 Gb/s, 231-1, NRZ PRBS. The transmit eye exhibits a high extinction ratio>12.5 dB with 1 ps added RMS jitter and 4 dbm output power. Receive sensitivity is better than –7.8 dBm with 0.22 dB dispersion penalty. I
In this paper, we report a manufacturable InP DHBT technology, suitable for medium scale mixed-signa...
79 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 2007.Two integrated circuits using ...
International audienceIn this Letter, the authors report on the design, optimisation and electrical ...
Abstract — This paper presents 40-Gbit/s time division mul-tiplexing (TDM) transmission technologies...
A highly integrated chipset comprising a transmitter (TX) and a receiver (RX) chip, based on a 250 n...
In this paper, we report the achieved performance of devices and integrated circuits (ICs) using a m...
We report on design and test of state-of-the-art building blocks for a 100 Gb/s demonstrator system:...
In this paper we present two ICs fabricated in InP DHBT technology and devoted to 43 Gbit/s and over...
Key components and architecture options are being actively investigated to realize next generation t...
We report the performances of a 0.7-μm InP/GaInAs DHBT developed in III-V Lab demonstrating both f T...
A manufacturable, reliable, and high performance InP Heterostructure Bipolar Transistors device tech...
It is now clear that 112-Gb/s data rate is the next step in the network evolution (100-Gb/s Ethernet...
International audienceWe report on an Indium Phosphide (InP) double heterojunction bipolar transisto...
This paper presents a 4:1 multiplexer fabricated in InP double heterojunction bipolar transistor (DH...
Research and development of InP--based transistors and integrated circuits (ICs)are driven by applic...
In this paper, we report a manufacturable InP DHBT technology, suitable for medium scale mixed-signa...
79 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 2007.Two integrated circuits using ...
International audienceIn this Letter, the authors report on the design, optimisation and electrical ...
Abstract — This paper presents 40-Gbit/s time division mul-tiplexing (TDM) transmission technologies...
A highly integrated chipset comprising a transmitter (TX) and a receiver (RX) chip, based on a 250 n...
In this paper, we report the achieved performance of devices and integrated circuits (ICs) using a m...
We report on design and test of state-of-the-art building blocks for a 100 Gb/s demonstrator system:...
In this paper we present two ICs fabricated in InP DHBT technology and devoted to 43 Gbit/s and over...
Key components and architecture options are being actively investigated to realize next generation t...
We report the performances of a 0.7-μm InP/GaInAs DHBT developed in III-V Lab demonstrating both f T...
A manufacturable, reliable, and high performance InP Heterostructure Bipolar Transistors device tech...
It is now clear that 112-Gb/s data rate is the next step in the network evolution (100-Gb/s Ethernet...
International audienceWe report on an Indium Phosphide (InP) double heterojunction bipolar transisto...
This paper presents a 4:1 multiplexer fabricated in InP double heterojunction bipolar transistor (DH...
Research and development of InP--based transistors and integrated circuits (ICs)are driven by applic...
In this paper, we report a manufacturable InP DHBT technology, suitable for medium scale mixed-signa...
79 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 2007.Two integrated circuits using ...
International audienceIn this Letter, the authors report on the design, optimisation and electrical ...