Technology Complex

Abstract. This paper presents a method to predict perform processor cores in a reconfigurable system for embedded applications. A multiprocessor framework is developed with the capability of reconfigurable processors in a shared memory system optimized for stream signal processing applications. The framework features a discrete time Markov based stochastic tool, which is used to analyze memory contention in the shared memory architecture, and to predict the performance increase (speed of execution) when the number of processors i variations of other system parameters, such as different task allocations and the number of pipeline stages are possible were verified by experimental results of a green scre and run on a Xilinx Virte