The electrodeposited Cu film morphology on thin physical vapor deposited (PVD) Cu seed for various conditions and correlation with Cu fill of dual Damascene structures is discussed. Thinner PVD Cu seed on Ta yields isolated electrodeposited Cu particles, while smooth plated films are obtained for thicker seed. Changes in suppressor additive and virgin makeup solution (VMS) concentrations have a limited impact on the morphology of Cu electrodeposited on thin Cu seed. Increased seed to plate queue time appears to lead to coarser, more isolated deposited Cu particles. Changes in Cu fill performance of dual Damascene structures having a 28 nm critical dimension (CD) were consistent with blanket wafer results for seed to plate queue times, but l...
Because of concerns about its reliability and its effects on the speed of electronic devices, seriou...
Copper damascene electrochemical deposition has been the preferred process used to deposit interconn...
The demand for more functionality in a smaller amount of space has driven the microelectronics indus...
The electrodeposited Cu film morphology on thin physical vapor deposited (PVD) Cu seed for various c...
A novel Cu reflow seed process which utilizes physical vapor deposition (PVD) technology components ...
As a superior substituent for the chemical-vapor deposition and physical-vapor deposition ~PVD! Cu ...
The deposition of a conformal seed layer within dual-Damascene features is one of the challenges in ...
Cu gap-fill is enhanced by replacing the conventional Ta liner with a Co liner in a 22 nm width inte...
[[abstract]]This work examines the impact of the wetting ability of a plating electrolyte on the Cu ...
A wafer-scale wet alkaline seed electrodeposition process directly on resistive substrates, such as ...
The continuous miniaturization of copper chip wiring, and consequently shrinkage of line width and v...
Electrochemical behaviors of the base electrolyte containing different additives were investigated b...
To enable Cu fill of through-Si vias (TSV) with a high aspect ratio (diameter 3 μm, depth 50 μm), th...
Surface morphology, crystallographic texture and microstructure of Cu films deposited at temperature...
email Contact author Open PDF With ultra-large-scale integration progress, efficient copper metalliz...
Because of concerns about its reliability and its effects on the speed of electronic devices, seriou...
Copper damascene electrochemical deposition has been the preferred process used to deposit interconn...
The demand for more functionality in a smaller amount of space has driven the microelectronics indus...
The electrodeposited Cu film morphology on thin physical vapor deposited (PVD) Cu seed for various c...
A novel Cu reflow seed process which utilizes physical vapor deposition (PVD) technology components ...
As a superior substituent for the chemical-vapor deposition and physical-vapor deposition ~PVD! Cu ...
The deposition of a conformal seed layer within dual-Damascene features is one of the challenges in ...
Cu gap-fill is enhanced by replacing the conventional Ta liner with a Co liner in a 22 nm width inte...
[[abstract]]This work examines the impact of the wetting ability of a plating electrolyte on the Cu ...
A wafer-scale wet alkaline seed electrodeposition process directly on resistive substrates, such as ...
The continuous miniaturization of copper chip wiring, and consequently shrinkage of line width and v...
Electrochemical behaviors of the base electrolyte containing different additives were investigated b...
To enable Cu fill of through-Si vias (TSV) with a high aspect ratio (diameter 3 μm, depth 50 μm), th...
Surface morphology, crystallographic texture and microstructure of Cu films deposited at temperature...
email Contact author Open PDF With ultra-large-scale integration progress, efficient copper metalliz...
Because of concerns about its reliability and its effects on the speed of electronic devices, seriou...
Copper damascene electrochemical deposition has been the preferred process used to deposit interconn...
The demand for more functionality in a smaller amount of space has driven the microelectronics indus...