Most microelectronic devices are fabricated on single crystalline silicon substrates that are grown from the melt by the Czochralski crystal growth method. There is an ever increas-ing demand for control of size and density of microdefects in the silicon for control of quality and uniformity of the fabricated microelectronic devices. This thesis is aimed at developing a fundamental understanding of the mechanisms for formation of such micro-defects through the development of models, theoretical analysis and large-scale simula-tion. Two major problems have been addressed. First, following the work of T. Sinno [150] and T. Mori [108], models have been developed for the transport, reaction and aggregation of native point defects — self-interst...
The oxygen precipitation in high purity CZ-silicon for ULSI is investigated with regard to the LO-HI...
As the device dimension in semiconductor silicon transistors reach sub-20nm, it significantly enhanc...
Gettering is defined as a process by which metal impurities in the device region are reduced by loca...
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Chemical Engineering, February 2003...
The vast majority of modern microelectronic devices are fabricated on single-crystal silicon wafers,...
The vast majority of modern microelectronic devices are fabricated on single-crystal silicon wafers,...
Modern microelectronic device manufacture requires single-crystal silicon substrates of unprecedente...
The effect of material defects in silicon, nucleated and grown during crystal growth, on subsequent ...
An oxygen precipitation/surface stacking-fault growth experiment has been carried out to determine t...
Thesis (Ph.D.)--University of Washington, 2013The demand for ever smaller, higher-performance integr...
Taking into account a wide variety of recent results from studies of silicon crystal growth and high...
As the device dimension in semiconductor silicon transistors reach sub-20nm, it significantly enhanc...
The impact of self-interstitials and strain on the critical size for nucleation of incoherent precip...
As the device dimension in semiconductor silicon transistors reach sub-20nm, it significantly enhanc...
This paper emphasizes that the furnace pressure, crucible rotation, and pulling rate have important ...
The oxygen precipitation in high purity CZ-silicon for ULSI is investigated with regard to the LO-HI...
As the device dimension in semiconductor silicon transistors reach sub-20nm, it significantly enhanc...
Gettering is defined as a process by which metal impurities in the device region are reduced by loca...
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Chemical Engineering, February 2003...
The vast majority of modern microelectronic devices are fabricated on single-crystal silicon wafers,...
The vast majority of modern microelectronic devices are fabricated on single-crystal silicon wafers,...
Modern microelectronic device manufacture requires single-crystal silicon substrates of unprecedente...
The effect of material defects in silicon, nucleated and grown during crystal growth, on subsequent ...
An oxygen precipitation/surface stacking-fault growth experiment has been carried out to determine t...
Thesis (Ph.D.)--University of Washington, 2013The demand for ever smaller, higher-performance integr...
Taking into account a wide variety of recent results from studies of silicon crystal growth and high...
As the device dimension in semiconductor silicon transistors reach sub-20nm, it significantly enhanc...
The impact of self-interstitials and strain on the critical size for nucleation of incoherent precip...
As the device dimension in semiconductor silicon transistors reach sub-20nm, it significantly enhanc...
This paper emphasizes that the furnace pressure, crucible rotation, and pulling rate have important ...
The oxygen precipitation in high purity CZ-silicon for ULSI is investigated with regard to the LO-HI...
As the device dimension in semiconductor silicon transistors reach sub-20nm, it significantly enhanc...
Gettering is defined as a process by which metal impurities in the device region are reduced by loca...