textThe unabated silicon technology scaling makes design and manufacturing increasingly harder in nanometer VLSI. Emerging technologies on the horizon require strong design automation to handle the large complexity of future systems. This dissertation studies eight related research topics in design and manufacturing closure in nanometer VLSI as well as design optimization for emerging technologies from physical synthesis perspective. In physical synthesis for design closure, we study three research topics, which are key challenges in nanometer VLSI designs: (a) We propose a highly efficient floorplanning algorithm to minimize substrate noise for mixed-signal system-on-a-chip designs. (b) We propose a clock tree synthesis algorithm to reduce...
Along the history of Very Large Scale Integration (VLSI), we have successfully scaled down the size ...
As CMOS manufacturing technology approaches fundamental limits, researchers are looking for revoluti...
Modern semiconductor manufacturing facilitates single-chip electronic systems that only five years a...
textThe unabated silicon technology scaling makes design and manufacturing increasingly harder in na...
textLogic optimization and clock network optimization for power, performance and area trade-off have...
As Very Large Scale Integration (VLSI) technology moves to the nanoscale regime, design and manufac...
Increasing challenges arise with each new semiconductor technology node, especially in advanced node...
In a VLSI physical synthesis flow, placement directly defines the interconnection, which affects ma...
textAs nanometer Very Large Scale Integration (VLSI) demands more transistor density to fabricate mu...
In nowadays nanometer technology nodes, the semiconductor industry has to deal with the new challeng...
[[abstract]]As IC process geometries scale down to the nanometer territory, the industry faces sever...
A conventional logic synthesis flow is composed of three separate phases: technologyindependent opti...
textWith continuous and aggressive scaling in semiconductor technology, there is an increasing gap b...
In VLSI physical design, the routing task consists of using over-the-cell metal wires to connect pin...
Each reduction of the technology node has, along with improvements in IC fabricationtechnology, been...
Along the history of Very Large Scale Integration (VLSI), we have successfully scaled down the size ...
As CMOS manufacturing technology approaches fundamental limits, researchers are looking for revoluti...
Modern semiconductor manufacturing facilitates single-chip electronic systems that only five years a...
textThe unabated silicon technology scaling makes design and manufacturing increasingly harder in na...
textLogic optimization and clock network optimization for power, performance and area trade-off have...
As Very Large Scale Integration (VLSI) technology moves to the nanoscale regime, design and manufac...
Increasing challenges arise with each new semiconductor technology node, especially in advanced node...
In a VLSI physical synthesis flow, placement directly defines the interconnection, which affects ma...
textAs nanometer Very Large Scale Integration (VLSI) demands more transistor density to fabricate mu...
In nowadays nanometer technology nodes, the semiconductor industry has to deal with the new challeng...
[[abstract]]As IC process geometries scale down to the nanometer territory, the industry faces sever...
A conventional logic synthesis flow is composed of three separate phases: technologyindependent opti...
textWith continuous and aggressive scaling in semiconductor technology, there is an increasing gap b...
In VLSI physical design, the routing task consists of using over-the-cell metal wires to connect pin...
Each reduction of the technology node has, along with improvements in IC fabricationtechnology, been...
Along the history of Very Large Scale Integration (VLSI), we have successfully scaled down the size ...
As CMOS manufacturing technology approaches fundamental limits, researchers are looking for revoluti...
Modern semiconductor manufacturing facilitates single-chip electronic systems that only five years a...