Abstract—In this letter, we report metal nanocrystal (NC)-based Flash memory devices with single-layer (SL) and dual-layer (DL) Pt NCs as the storage element. The devices are fabricated using CMOS compatible process flow with optimized low-leakage high-k Al2O3 as the control dielectric. Large memory window (10 V for SL and 15 V for DL devices) is observed due to overerase, which increases the overall window. Improvement in DL memory window is found to be due to 1.5 times improvement in total stored charge over SL. Excellent high-temperature precycling retention is observed both for SL and DL devices. Index Terms—Dual layer (DL), flash memory, metal nano-crystal (NC). I
Below the 65nm technology node, the present Flash memory technology is facing daunting scaling chall...
Nanocrystals memory cells, in which the conventional polysilicon floating gate is replaced by an arr...
Nanocrystals memory cells, in which the conventional polysilicon floating gate is replaced by an arr...
Most of the current high-density Flash cells use multi-level-cell (MLC) technology to store 2-bits/c...
Most of the current high-density Flash cells use multi-level-cell (MLC) technology to store 2-bits/c...
In this paper, we report on the fabrication and reliability characterization of gold (Au) and platin...
In this paper, we report on the fabrication and reliability characterization of gold (Au) and platin...
Memory Window (MW) and the retention of Single-layer (SL) and Dual-layer (DL) Platinum (Pt) Nanocrys...
Memory window (MW) and the retention of single-layer (SL) and dual-layer (DL) platinum (Pt) nanocrys...
The cell characteristics of an alloy FePt nano-dot (ND) charge trapping memory with a high-k dielect...
Nanocrystals can be used as storage media for carriers in flash memories. The performance of a nanoc...
Integration of discrete charge storage in nanocrystals (NC) or dielectric traps is shown to alleviat...
[[abstract]]A semiconductor memory with nanocrystal embedded in the gate dielectric was proposed to ...
A simple and low-cost process of embedding metal nanocrystals as charge storage centers within a die...
xv, 140 leaves : ill. ; 31 cm.PolyU Library Call No.: [THS] LG51 .H577P AP 2007 LeeNanocrystals (NC)...
Below the 65nm technology node, the present Flash memory technology is facing daunting scaling chall...
Nanocrystals memory cells, in which the conventional polysilicon floating gate is replaced by an arr...
Nanocrystals memory cells, in which the conventional polysilicon floating gate is replaced by an arr...
Most of the current high-density Flash cells use multi-level-cell (MLC) technology to store 2-bits/c...
Most of the current high-density Flash cells use multi-level-cell (MLC) technology to store 2-bits/c...
In this paper, we report on the fabrication and reliability characterization of gold (Au) and platin...
In this paper, we report on the fabrication and reliability characterization of gold (Au) and platin...
Memory Window (MW) and the retention of Single-layer (SL) and Dual-layer (DL) Platinum (Pt) Nanocrys...
Memory window (MW) and the retention of single-layer (SL) and dual-layer (DL) platinum (Pt) nanocrys...
The cell characteristics of an alloy FePt nano-dot (ND) charge trapping memory with a high-k dielect...
Nanocrystals can be used as storage media for carriers in flash memories. The performance of a nanoc...
Integration of discrete charge storage in nanocrystals (NC) or dielectric traps is shown to alleviat...
[[abstract]]A semiconductor memory with nanocrystal embedded in the gate dielectric was proposed to ...
A simple and low-cost process of embedding metal nanocrystals as charge storage centers within a die...
xv, 140 leaves : ill. ; 31 cm.PolyU Library Call No.: [THS] LG51 .H577P AP 2007 LeeNanocrystals (NC)...
Below the 65nm technology node, the present Flash memory technology is facing daunting scaling chall...
Nanocrystals memory cells, in which the conventional polysilicon floating gate is replaced by an arr...
Nanocrystals memory cells, in which the conventional polysilicon floating gate is replaced by an arr...