A Universal Fault Injector for Structural Simulation Environments

Smaller feature size, greater chip density, and minimal power con-sumption all lead to an increased number of faults in computing sys-tems. Among these faults are soft errors. They are mainly caused by incident radiation. When a particle strikes a semiconductor and deposits enough energy along its path, charge builds up and the tran-sistor temporarily has a different state. If this state is captured by a memory element such as a latch, the system can produce a faulty result. Due to the current technology trends ever decreasing the fea-ture size and minimizing power consumption, reliability is becoming a serious concern in the current and future designs. More and more research is dedicated to fault tolerance of computing systems. One of the problems this research faces is a lack of adequate fault injec-tion tools necessary to perform experimental evaluation of novel fault tolerance techniques. The best experimental setup would consist of a physical hardware placed into an appropriate environment. Thi