Strain Stability in Nanoscale Patterned Strained Silicon-on-Insulator

Strained silicon-on-insulator (SSOI) is an emerging material that combines the benefits of strained silicon [1] and silicon-on-insulator [2] technologies. SSOI enables the mobility enhancement in MOSFETs [3) and circumvents the difficulties encountered in the processing of SiGe-based strained Si devices [4] namely the enhanced dopant diffusion, high leakage current and Ge diffusion into the strained layer. The potential use of SSOI in near-term generations of CMOS technologies has brought up concerns about the strain stability during different steps of device processing [5-11]. Recent studies showed that the residual strain in the patterned nanostructures is sensitive to thickness [7, 8, 11], size [7, 11], and geometry [10]. Developing a quantitative and predictive model of the strain relaxation during SSO