VME BUS PERFORMANCE IN MULTIPROCESSOR SYSTEMS

The complexity of future control systems will require large amounts of processing power in each individual subsystem. This can be achieved by using a higher performance processor or by using multiple processors within a single system. Multiple processors on a single bus may saturate the bus so as to reduce the expected performance gain. In order to determine an empirical limit for the number of processors that a VME bus can support, experiments were conducted to find the point at which VME system output was not increased by the addition of more processors. This paper details the results of those tests. Goals of the Test In order to generate some facts ’ about the performance of VME in a multiprocessor configuration, a simple set of tests were conducted. The goals of these tests were to: l Determine the incremental system performance improvement as a function of the number of CPUs * Determine how much effect different arbitration schemes have on system performance l Determine the system performance at various bus utilization levels Test Hardware Confipuratiorr The test setup hardware was assembled from available components. These are not high performance parts but are representative of the hardware that is used to build embedded systems at Fermilab. The test hardware consisted of: 1 VME Crate with power suppl