Concurrent Technology, Device, and Circuit Development for

Circuit simulation enters into a new stage of enhanced importance. From the conventional circuit simulator for circuit design an active tool for concurrent engi-neering is emerging, which allows to integrate tech-nology, device and circuit development in parallel. We will show here an EEPROM development case, which has been done on a transient circuit simulation level from the beginning. A precise unified EEPROM cell model was developed describing all characteris-tics with surface potentials dependent on technolog-ical parameter values. This new model enabled us to realize the requested circuitry goals from the first wafer run. 1. EEPROM Characteristics A cross-section of a generic EEPROM cell is shown in Fig. 1 [l]. The main feature of the cell is the tunneling Fig. 1: Cross-section of an EEPROM cell. Charges flow from the drain contact DC through the tunneling oxide TOX into the floating gate FG and vice versa. of charges through the oxide To, between the floating gate FG and the drain contact DC, causing a current It",,. The resulting negative or positive charges on FG are responsible for a threshold voltage &h shift to higher or lower values, which determines the write or erase state. To reduce the total amount of the development cost, it has been proposed to undertake concurrent engineering [2]. For this purpose a pre-cise technology based model of the EEPROM cell is essential. Existing models mostly concentrate on a specific part of the EEPROM characteristics [3]. Our aim here is to show that a model describing the com-plete static and dynamic cell characteristics on the circuit level is required for the concurrent develop ment of EEPROMs