DARPA’s AACE project aimed to develop Architecture Aware Compiler Environments. Such a compiler automatically characterizes the targeted hardware and optimizes the application codes accordingly. We present the BlackjackBench suite, a collection of portable micro-benchmarks that automate system characterization, plus statistical analysis techniques for interpreting the results. The BlackjackBench benchmarks discover the effective sizes and speeds of the hardware environment rather than the often unattainable peak values. We aim at hardware characteristics that can be observed by running executables generated by existing compilers from standard C codes. We characterize the memory hierarchy, including cache sharing and non-uniform memory acces...
We present preliminary results of theRooflineToolkit formulticore, manycore, and accelerated archite...
This paper presents a novel benchmark synthesis framework with three key features. First, it generat...
Abstract. The increasing complexity of computer architectures has made the approach of automatically...
DARPA’s AACE project aimed to develop Architecture Aware Compiler Environments. Such a compiler auto...
Applications may have unintended performance problems in spite of compiler optimizations, because of...
Application performance on modern microprocessors depends heavily on performance related characteris...
Developing an optimizing compiler for a newly proposed architecture is extremely difficult when ther...
A simple, tunable, synthetic benchmark with a performance directly related to applications would be ...
We introduce the usage of hardware performance counters (HPCs) as a new method that allows very prec...
The decision which hardware platform to use for a certain application is an important problem in com...
Embedded processor designs are increasingly based on general-purpose processor families, modified a...
Workload characterization has been proven an essential tool to architecture design and performance e...
Producing quality code is one of the most important goals of an optimizing compiler. Analyzing code ...
Understanding the behavior of current and future workloads is key for designers of future computer s...
BABAR is a high-rate experiment to study CP violation in asymmetric e + e \Gamma collisions. The...
We present preliminary results of theRooflineToolkit formulticore, manycore, and accelerated archite...
This paper presents a novel benchmark synthesis framework with three key features. First, it generat...
Abstract. The increasing complexity of computer architectures has made the approach of automatically...
DARPA’s AACE project aimed to develop Architecture Aware Compiler Environments. Such a compiler auto...
Applications may have unintended performance problems in spite of compiler optimizations, because of...
Application performance on modern microprocessors depends heavily on performance related characteris...
Developing an optimizing compiler for a newly proposed architecture is extremely difficult when ther...
A simple, tunable, synthetic benchmark with a performance directly related to applications would be ...
We introduce the usage of hardware performance counters (HPCs) as a new method that allows very prec...
The decision which hardware platform to use for a certain application is an important problem in com...
Embedded processor designs are increasingly based on general-purpose processor families, modified a...
Workload characterization has been proven an essential tool to architecture design and performance e...
Producing quality code is one of the most important goals of an optimizing compiler. Analyzing code ...
Understanding the behavior of current and future workloads is key for designers of future computer s...
BABAR is a high-rate experiment to study CP violation in asymmetric e + e \Gamma collisions. The...
We present preliminary results of theRooflineToolkit formulticore, manycore, and accelerated archite...
This paper presents a novel benchmark synthesis framework with three key features. First, it generat...
Abstract. The increasing complexity of computer architectures has made the approach of automatically...