A 50 mvertices/s graphics processor with fixed-point programmable vertex shader for mobile applications

Abstract—A 36 mm2 graphics processor with fixed-point programmable vertex shader is designed and implemented for portable two-dimensional (2-D) and three-dimensional (3-D) graphics applications. The graphics processor contains an ARM-10 compatible 32-bit RISC processor, a 128-bit pro-grammable fixed-point single-instruction-multiple-data (SIMD) vertex shader, a low-power rendering engine, and a programmable frequency synthesizer (PFS). Different from conventional graphics hardware, the proposed graphics processor implements ARM-10 co-processor architecture with dual operations so that user-pro-grammable vertex shading is possible for advanced graphics algorithms and various streaming multimedia processing in mo-bile applications. The circuits and architecture of the graphics processor are optimized for fixed-point operations and achieve the low power consumption with help of instruction-level power management of the vertex shader and pixel-level clock gating of the rendering engine. The PFS with a fully balanced voltage-con-trolled oscillator (VCO) controls the clock frequency from 8 MHz to 271 MHz continuously and adaptively for low-power modes by software. The chip shows 50 Mvertices/s and 200 Mtexels/s peak graphics performance, dissipating 155 mW in 0.18- m 6-metal standard CMOS logic process. Index Terms—ARM co-processor, fixed-point system, frequency scaling, low-power electronics, mobile applications, programma-bility, rendering engine, single-instruction-multiple-data (SIMD) processing, three-dimensional graphics, vertex shader. I