Abstract—Damage-free sputter deposition and highly selec-tive dry-etch processes have been developed for molybdenum (Mo) metal gate technology, for application to fully depleted silicon-on-insulator ( devices such as the ultrathin body (UTB) MOSFET and double-gate FinFET. A plasma charge trap effec-tively eliminates high-energy particle bombardment during Mo sputtering; hence the gate-dielectric integrity (TDDB, BD) is significantly improved and the field-effect mobility in Mo-gated MOSFETs follows the universal mobility curve. The effects of etch process parameters such as chlorine (Cl 2) and oxygen (
[[abstract]]The electrical and surface characteristics of a metal-oxide-semiconductor (MOS) device w...
Focusing on sub-10 nm Silicon CMOS device fabrication technology, we have incorporated ultrathin TiN...
This paper reports the fabrication of bulk molybdenum field emitter arrays with integrated, self-ali...
This paper demonstrates a low damage inductively coupled plasma SF6/C4F8 dry etch process for the re...
Recently, refractory metals, such as W and Mo, with low resistivity and a high melting point have re...
An anisotropic dry etching process for submicrometer silicon gate N channel MOS technology has been ...
Abstract—A novel transistor formation process (damascene gate process) was developed in order to app...
textAggressive scaling required to augment device performance has caused conventional electrode mate...
textCMOS technology has been so successful in improving device performance, shrinking device size a...
Due to the aggressive scaling of CMOS devices, it is necessary to provide a metal gate solution to r...
Résumé. 2014 Un procédé de gravure sèche a été mis au point pour la fabrication de transistors MOS s...
The ever increasing demand for improved performance of silicon based microelectronics, at a lower co...
[[abstract]]Effect of chemical dry cleaning (CDC) and pre-treatment (NH3 annealing) on the interface...
Considerable research attention has focused on the potential of HfO2 as a next-generation gate diele...
[[abstract]]Effect of chemical dry cleaning (CDC) and pre-treatment (NH3 annealing) on the interface...
[[abstract]]The electrical and surface characteristics of a metal-oxide-semiconductor (MOS) device w...
Focusing on sub-10 nm Silicon CMOS device fabrication technology, we have incorporated ultrathin TiN...
This paper reports the fabrication of bulk molybdenum field emitter arrays with integrated, self-ali...
This paper demonstrates a low damage inductively coupled plasma SF6/C4F8 dry etch process for the re...
Recently, refractory metals, such as W and Mo, with low resistivity and a high melting point have re...
An anisotropic dry etching process for submicrometer silicon gate N channel MOS technology has been ...
Abstract—A novel transistor formation process (damascene gate process) was developed in order to app...
textAggressive scaling required to augment device performance has caused conventional electrode mate...
textCMOS technology has been so successful in improving device performance, shrinking device size a...
Due to the aggressive scaling of CMOS devices, it is necessary to provide a metal gate solution to r...
Résumé. 2014 Un procédé de gravure sèche a été mis au point pour la fabrication de transistors MOS s...
The ever increasing demand for improved performance of silicon based microelectronics, at a lower co...
[[abstract]]Effect of chemical dry cleaning (CDC) and pre-treatment (NH3 annealing) on the interface...
Considerable research attention has focused on the potential of HfO2 as a next-generation gate diele...
[[abstract]]Effect of chemical dry cleaning (CDC) and pre-treatment (NH3 annealing) on the interface...
[[abstract]]The electrical and surface characteristics of a metal-oxide-semiconductor (MOS) device w...
Focusing on sub-10 nm Silicon CMOS device fabrication technology, we have incorporated ultrathin TiN...
This paper reports the fabrication of bulk molybdenum field emitter arrays with integrated, self-ali...