0some of the early publications.9-11 The focus of this paper is on clean system to remove residue buildup during the deposition and to l i i n a

Downlotrench fill using chemical vapor deposited (CVD) SiO2 film to achieve void-free gap filling capability as well as etch resistance to later process steps, i.e., chemical mechanical polishing (CMP) and HF dip. To date, the available options for such trench fill include ozone/tetraethylorthosilicate (TEOS)-based thermal process using atmospheric pressure, low pressure, and subatmospheric (SA) CVD, and silane-based high-density plasma (HDP) process. Except for low pressure chemical vapor deposition (LPCVD),12 both thermal and HDP processes have been proven to yield void-free gap fill after film deposition. An ozone-TEOS film provides flow-like gap fill perfor-mance and has potential extendibility to #0.15 mm device features, because the deposition rate is independent of aspect ratio. On the other hand, thermal films usually have low density, leading to poor moisture and etch resistance. Therefore, a postdeposition high-tem-perature anneal is required, which can potentially open up seams inside the trench due to film shrinkage. To overcome these problems, a high temperature film deposition is desired to achieve low wet etch rate as well as minimal film shrinkage. In this study, we report a complete characterization for SA CVD high temperature (T $ 5508C) O3-TEOS processes, aimed at providing a solution for STI for the 0.25 mm device generation and below. Experimental The experiments were conducted in an Applied Materials Centu-ensure process repeatability from wafer to wafer. The controllable variables for the undoped silicate glass (USG) deposition proces