Phase Disposition PWM Technique for Eleven Level Cascaded Multilevel Inverter with Reduced Number of Carriers

Applying pulse width modulation (PWM) techniques for cascaded multilevel inverters are very complex for topologies with reduced number of switches. In this paper for phase disposition (PD) pulse width modulation technique a new algorithm is proposed and implemented on eleven level cascaded multilevel inverter under reduced switches topology. In the proposed algorithm instead of N-1 carrier waves, the required number of switching pulses generated by considering number of carrier waves is equal to number of switches. This technique allows lower switching transition and it leads to reduced switching losses for topologies utilize minimum number of switches. 1.2 KHz carrier frequency is used to generate switching pulses and verified up to 100 kHz. The Total harmonic distortion is observed for various switching frequencies. The obtained output voltage levels using PD PWM technique proved mathematically. The performance of proposed algorithm is evaluated using Matlab/Simulink