A reduction in the minimum attainable feature size in integrated circuits h.s lead to the possibility of more and more complex circuits being built on a single chip (VLSI). This technological advance brings with it the need to make these circuits fault tolerant: to increase yield and reliability and to reduce testing times. This Memorandum briefly reviews current techniques for designing fault tolerant circuitSbefore concentrating on a new, high-level fault tolerance technique: algorithmic fault tolerance. The concept of algorithmic fault tolerance is explained and various techniques are reviewed with regard to their suitability for providing fault tolerance for signal processing algorithms. Suggestions are made for the direction for furthe...
We present a new approach to fault tolerance for High Performance Computing system. Our approach is ...
To meet an insatiable consumer demand for greater performance at less power, silicon technology has ...
This paper focuses on the investigation of efficient methods to evaluate circuit fault-tolerance. We...
2011-09-14As VLSI technology node scales to nano-scale, dramatic improvements in most attributes of ...
As late-CMOS process scaling leads to increasingly variable circuits/logic and as most post-CMOS tec...
A new ABFT architecture is proposed to tolerate multiple soft-errors with low overheads. It memorize...
Integrated Circuit (IC) technology is getting more advanced and the number of transistors require...
The Dagstuhl seminar 08371 on Fault-Tolerant Distributed Algorithms on VLSI Chips was devoted to exp...
En approchant leurs limites ultimes, les technologies de silicium sont affectées par divers problème...
Causes and symptoms of logic faults in digital systems. Reliable performance of hardware has been a ...
This paper discusses the detection of Fault Tolerance in computers. It outlines the present techniqu...
This paper speculates that technology trends pose new challenges for fault tolerance in microprocess...
As the limits of computer technology are pushed into the domains of the very small, the very cheap, ...
In modern logic circuits, fault-tolerance is increasingly important, since even atomic-scale imperfe...
Abstract- The rapid progress in VLSI technology has reduced the cost of hardware, allowing multiple ...
We present a new approach to fault tolerance for High Performance Computing system. Our approach is ...
To meet an insatiable consumer demand for greater performance at less power, silicon technology has ...
This paper focuses on the investigation of efficient methods to evaluate circuit fault-tolerance. We...
2011-09-14As VLSI technology node scales to nano-scale, dramatic improvements in most attributes of ...
As late-CMOS process scaling leads to increasingly variable circuits/logic and as most post-CMOS tec...
A new ABFT architecture is proposed to tolerate multiple soft-errors with low overheads. It memorize...
Integrated Circuit (IC) technology is getting more advanced and the number of transistors require...
The Dagstuhl seminar 08371 on Fault-Tolerant Distributed Algorithms on VLSI Chips was devoted to exp...
En approchant leurs limites ultimes, les technologies de silicium sont affectées par divers problème...
Causes and symptoms of logic faults in digital systems. Reliable performance of hardware has been a ...
This paper discusses the detection of Fault Tolerance in computers. It outlines the present techniqu...
This paper speculates that technology trends pose new challenges for fault tolerance in microprocess...
As the limits of computer technology are pushed into the domains of the very small, the very cheap, ...
In modern logic circuits, fault-tolerance is increasingly important, since even atomic-scale imperfe...
Abstract- The rapid progress in VLSI technology has reduced the cost of hardware, allowing multiple ...
We present a new approach to fault tolerance for High Performance Computing system. Our approach is ...
To meet an insatiable consumer demand for greater performance at less power, silicon technology has ...
This paper focuses on the investigation of efficient methods to evaluate circuit fault-tolerance. We...