Module for timing and energy measurements in High Energy

experiment at Japan Particle Accelerator Research Complex (JPARC). Before being digitized, the differential inputs are amplified and shaped with low-pass filters, designed specifically for the scintillating material used in the experiment. Following shaping and sampling, data are fed to the on-board FPGA, and stored inside an adjustable pipeline memory, awaiting the trigger pulse. A digital data delay of up to 5,000 samples is possible. The Module can work independently, in a self-trigger mode, or it can be part of a large DAQ system with a unique system trigger. For sampling, the Module can use a locally generated clock, or it can work on a system level, simultaneous clock, provided at its front panel. After trigger, sets of data are packed and buffered. Depending on throughput requirements, the readout can be performed via the VME64 back plane or via the front-panel optical links. The powerful processing capabilities within the high-density FPGA allow for future design enhancements. Real-time local data processing and reduction algorithms can be implemented. The Module is fitted with two optical link transceivers at the front panel with 2.5 GBPS each. One optical link output is used for data read-out, and one for real-time total energy values. The two optical-link inputs are used to merge energy values calculated in other modules. By doing this, one can successively calculate the energy for the entire system and generate Level 1 triggers, with no additional hardware required. Design, module specifications, and test results will be described. I