Scratch-pad memories (SPM) are small on-chip mem-ory devices whose access is much faster and consumes much less energy than off-chip memories. While SPM are usually too small for containing all the code or data of an application, significant energy consumption re-ductions can be achieved by assigning to them mem-ory objects which are often accessed. The stack is one of the most frequently accessed data memory object, but its dynamic behavior makes it difficult to place into the SPM. This paper presents a simple and practical technique for placing frequently accessed parts of the stack into the SPM. The technique has been designed for multi-task environments where the SPM is shared among several tasks. Results show that the proposed techniqu...
In order to meet the requirements concerning both performance and energy consumption in embedded sy...
Scratch Pad Memories (SPMs) have received considerable attention lately as on-chip memory building b...
Abstract—This paper presents a compiler strategy to optimize data accesses in regular array-intensiv...
「DAシンポジウム2010 : システムLSI設計技術とDA」2010年9月2日(木)~3日(金)にて発表された論文。DA Symposium 2010(System LSI and DA) : Se...
The 16th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2010...
In an effort to make processors more power efficient scratch pad memory (SPM) have been proposed ins...
Abstract—Memory accesses are a major cause of energy con-sumption for embedded systems and the stack...
A dynamic scratch pad memory (SPM) management scheme for program stack data with the objective of pr...
The 7th IEEE Workshop on Embedded Systems for Real-Time Multimedia : October 15, 2009 - October 16, ...
CASES 2010 : International Conference on Compilers, Architecture, and Synthesis for Embedded System...
Extensive work has been done for optimal management of scratch-pad memory (SPM) all assuming that th...
Nowadays, many embedded processors include in their architecture on-chip static memories, so called ...
This paper presents a dynamic scratchpad memory (SPM) code allocation technique for embedded systems...
Current trends indicate that leakage energy consumption will be an important concern in upcoming pro...
<p>An increasing number of processor architectures support scratch-pad memory - software manag...
In order to meet the requirements concerning both performance and energy consumption in embedded sy...
Scratch Pad Memories (SPMs) have received considerable attention lately as on-chip memory building b...
Abstract—This paper presents a compiler strategy to optimize data accesses in regular array-intensiv...
「DAシンポジウム2010 : システムLSI設計技術とDA」2010年9月2日(木)~3日(金)にて発表された論文。DA Symposium 2010(System LSI and DA) : Se...
The 16th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2010...
In an effort to make processors more power efficient scratch pad memory (SPM) have been proposed ins...
Abstract—Memory accesses are a major cause of energy con-sumption for embedded systems and the stack...
A dynamic scratch pad memory (SPM) management scheme for program stack data with the objective of pr...
The 7th IEEE Workshop on Embedded Systems for Real-Time Multimedia : October 15, 2009 - October 16, ...
CASES 2010 : International Conference on Compilers, Architecture, and Synthesis for Embedded System...
Extensive work has been done for optimal management of scratch-pad memory (SPM) all assuming that th...
Nowadays, many embedded processors include in their architecture on-chip static memories, so called ...
This paper presents a dynamic scratchpad memory (SPM) code allocation technique for embedded systems...
Current trends indicate that leakage energy consumption will be an important concern in upcoming pro...
<p>An increasing number of processor architectures support scratch-pad memory - software manag...
In order to meet the requirements concerning both performance and energy consumption in embedded sy...
Scratch Pad Memories (SPMs) have received considerable attention lately as on-chip memory building b...
Abstract—This paper presents a compiler strategy to optimize data accesses in regular array-intensiv...