In today’s embedded applications a significant portion of energy is spent in the memory subsystem. Several approaches have been proposed to minimize this energy, including the use of scratch pad memories, with many based on static analysis of a program. However, often it is not possible to perform static analysis and optimization of a program’s memory access behavior unless the program is specifically written for this purpose. In this paper we introduce the FORAY model of a program that permits aggressive analysis of the application’s memory behavior that further enables such optimizations since it consists of ‘for ’ loops and array accesses which are easily analyzable. We present FORAY-GEN: an automated profile-based approach for extractio...
This paper describes a program profiling and analysis tool called Gleipnir. Gleipnir collects memory...
UnrestrictedThe enormous and growing complexity of today's high-end systems has increased the alread...
In this paper, we propose a new methodology for optimal memory mapping of data and instructions to S...
Submitted on behalf of EDAA (http://www.edaa.com/)International audienceIn today's embedded applicat...
Many embedded array-intensive applications have irregular access patterns that are not amenable to s...
Complete comprehension of loop codes is desirable for a variety of program optimizations. Compilers ...
(eng) Portable or embedded systems allow more and more complex applications like multimedia today. T...
Many programmable embedded systems feature low power processors coupled with fast compiler controlle...
International audienceArray contraction is a compilation optimization used to reduce memory consumpt...
Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Comp...
AbstractApplication Specific Instruction-set Processors (ASIPs) are a realistic solution for domain-...
Achieving high application performance depends on the combination of memory footprint, instruction m...
The ever-increasing gap between processor and memory speed is an issue also in embedded systems, bec...
This is a post-peer-review, pre-copyedit version of an article published in IEEE Transactions on Com...
This work creates a set of concise test cases that accurately mimic the structure and workflow of sc...
This paper describes a program profiling and analysis tool called Gleipnir. Gleipnir collects memory...
UnrestrictedThe enormous and growing complexity of today's high-end systems has increased the alread...
In this paper, we propose a new methodology for optimal memory mapping of data and instructions to S...
Submitted on behalf of EDAA (http://www.edaa.com/)International audienceIn today's embedded applicat...
Many embedded array-intensive applications have irregular access patterns that are not amenable to s...
Complete comprehension of loop codes is desirable for a variety of program optimizations. Compilers ...
(eng) Portable or embedded systems allow more and more complex applications like multimedia today. T...
Many programmable embedded systems feature low power processors coupled with fast compiler controlle...
International audienceArray contraction is a compilation optimization used to reduce memory consumpt...
Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Comp...
AbstractApplication Specific Instruction-set Processors (ASIPs) are a realistic solution for domain-...
Achieving high application performance depends on the combination of memory footprint, instruction m...
The ever-increasing gap between processor and memory speed is an issue also in embedded systems, bec...
This is a post-peer-review, pre-copyedit version of an article published in IEEE Transactions on Com...
This work creates a set of concise test cases that accurately mimic the structure and workflow of sc...
This paper describes a program profiling and analysis tool called Gleipnir. Gleipnir collects memory...
UnrestrictedThe enormous and growing complexity of today's high-end systems has increased the alread...
In this paper, we propose a new methodology for optimal memory mapping of data and instructions to S...