Enhanced Polysilicon Thin-Film Transistor Performance by Oxide Encapsulation

Conventional polycrystalline silicon thin-film transistor (TFr) fabrication processes rely on an etching process to iso-late individual transistors. The subsequent growth of a gate insulator film by thermal oxidation of the islands produces a dielectric film which is significantly thinner along the edges of the island. As a result, the completed transistor exhibits significantly reduced gate breakdown characteristics, aswell as other adverse ffects related to the higher electric fields along the edges of the transistor channel. This paper discusses an alternative TFF fabrication process which employs a local oxidation process in order to eliminate these adverse ffects. Breakdown voltages for 60 nm thick gate insulators on 20 ~tm long p-channel TI~rs are increased from 37.5 to 60 V. This represents a breakdown field of 1.1 • 10 v V/cm. Transis