We present a new concept and its circuit implementation for a high-speed and low-voltage associative co-processor with Hamming distance ordering. A hierarchical search architec-ture keeps high speed in large input number. Our circuit im-plementation allows unlimited data base capacity and achieves low-voltage operation under 1.0V for SoC applications, which are difficult for the conventional analog approaches. The search logic embedded in a memory cell realizes word-parallel Ham-ming distance ordering for high-speed sorting/routing appli-cations as well as near/nearest-match detection for recogni-tion. Our fabricated 0.18 µm 64-bit 32-word associative co-processor operates 411.5 MHz and 40.0 MHz at 1.8V and 0.75V respectively
We propose a new generation of VLSI processor for pattern recognition based on Associative Memory ar...
VLSI architectures for finding the first W maximum/minimum values are highly demanded in the fields ...
Most memory devices store and retrieve data by addressing specific memory locations. As a result, th...
In this paper, we present a new concept and its circuit implemen-tation for high-speed associative m...
[[abstract]]The parallel processing elements (PPE) have been built around an associative memory (AM)...
Pattern matching algorithms, which may be realized via associative memories, require further improve...
A basic operation of pattern recognition is to find the nearest match between an input-data word of ...
Abstract—A minimum distance search engine (MDSE) is presented as a hardware accelerator for various ...
Pattern recognition and learning are basic functions, which are needed to build artificial systems w...
We present a compact and low-power rank-order searching (ROS) circuit that can be used for building ...
The associative memory (AM) system is a computing device made of hundreds of AM ASICs chips designed...
The associative memory (AM) chip is ASIC device specifically designed to perform ``pattern matching'...
International audienceThis paper presents algorithm, architecture, and fabrication results of a non-...
We describe an important advancement for the Associative Memory device (AM). The AM is a VLSI proces...
We present the performance of the new Associative Memory (AM) chip, designed and manufactured in 65 ...
We propose a new generation of VLSI processor for pattern recognition based on Associative Memory ar...
VLSI architectures for finding the first W maximum/minimum values are highly demanded in the fields ...
Most memory devices store and retrieve data by addressing specific memory locations. As a result, th...
In this paper, we present a new concept and its circuit implemen-tation for high-speed associative m...
[[abstract]]The parallel processing elements (PPE) have been built around an associative memory (AM)...
Pattern matching algorithms, which may be realized via associative memories, require further improve...
A basic operation of pattern recognition is to find the nearest match between an input-data word of ...
Abstract—A minimum distance search engine (MDSE) is presented as a hardware accelerator for various ...
Pattern recognition and learning are basic functions, which are needed to build artificial systems w...
We present a compact and low-power rank-order searching (ROS) circuit that can be used for building ...
The associative memory (AM) system is a computing device made of hundreds of AM ASICs chips designed...
The associative memory (AM) chip is ASIC device specifically designed to perform ``pattern matching'...
International audienceThis paper presents algorithm, architecture, and fabrication results of a non-...
We describe an important advancement for the Associative Memory device (AM). The AM is a VLSI proces...
We present the performance of the new Associative Memory (AM) chip, designed and manufactured in 65 ...
We propose a new generation of VLSI processor for pattern recognition based on Associative Memory ar...
VLSI architectures for finding the first W maximum/minimum values are highly demanded in the fields ...
Most memory devices store and retrieve data by addressing specific memory locations. As a result, th...