A common current source, generally used to bias cross-coupled differential amplifiers in a transconductor, controls third harmonic distortion (HD3) poorly. Separate current sources are shown to provide better control on HD3. In this paper, a detailed design and analysis is presented for a transconductor made using this biasing technique. The transconductor, in addition, is made to offer high Gm, low power dissipation and is designed for linearly tunable Gm with current mode load as one of the applications. The circuit exhibits HD3 of less than –43.7 dB, high current efficiency of 1.18 V−1 an
© 2019 IEEE. This paper presents a design of a highly linear fully differential operational transcon...
A linearly tunable low-voltage CMOS transconductor featuring a new adaptative-bias mechanism that co...
This paper presents a compensation structure to reduce the output common mode current of a rail-to-r...
This paper describes a method for analysis and design of MOS voltage-to-current converters (V–I conv...
The present work describes the design and analysis of an operational transconductance amplifier (vol...
A novel tunable transconductor is presented. Input transistors operate in the triode region to achi...
Abstract—A novel linear tunable transconductor based on a combination of linearization techniques is...
This paper presents a modified design method for linear transconductor circuit in 130 nm CMOS techn...
In this article, two new highly linear tunable transconductor circuits are proposed. The transconduc...
A differential input, single ended output transconductor with gm in the range 0.5-5 nS is presented....
A linear, tunable CMOS transconductance stage is introduced. Drain voltage of the input transistor o...
<p>To improve the linearity of the transconductor in digital TV tuner application, a new technique o...
In this article, two new highly linear tunable transconductor circuits are proposed. The transconduc...
In this paper, the design of wide-swing constant transconductance (gm) bias circuit that generates b...
This paper presents a transconductor suitable for implementation in submicron CMOS technology. The t...
© 2019 IEEE. This paper presents a design of a highly linear fully differential operational transcon...
A linearly tunable low-voltage CMOS transconductor featuring a new adaptative-bias mechanism that co...
This paper presents a compensation structure to reduce the output common mode current of a rail-to-r...
This paper describes a method for analysis and design of MOS voltage-to-current converters (V–I conv...
The present work describes the design and analysis of an operational transconductance amplifier (vol...
A novel tunable transconductor is presented. Input transistors operate in the triode region to achi...
Abstract—A novel linear tunable transconductor based on a combination of linearization techniques is...
This paper presents a modified design method for linear transconductor circuit in 130 nm CMOS techn...
In this article, two new highly linear tunable transconductor circuits are proposed. The transconduc...
A differential input, single ended output transconductor with gm in the range 0.5-5 nS is presented....
A linear, tunable CMOS transconductance stage is introduced. Drain voltage of the input transistor o...
<p>To improve the linearity of the transconductor in digital TV tuner application, a new technique o...
In this article, two new highly linear tunable transconductor circuits are proposed. The transconduc...
In this paper, the design of wide-swing constant transconductance (gm) bias circuit that generates b...
This paper presents a transconductor suitable for implementation in submicron CMOS technology. The t...
© 2019 IEEE. This paper presents a design of a highly linear fully differential operational transcon...
A linearly tunable low-voltage CMOS transconductor featuring a new adaptative-bias mechanism that co...
This paper presents a compensation structure to reduce the output common mode current of a rail-to-r...