Triple-Mode MAP/VA Timing Analysis for Unified Convolutional/Turbo Decoder Design

To satisfy the advanced FEC standard that performs both convolutional code and turbo code, a unified convolutional/turbo decoder is needed. In this paper, both timing of Viterbi and MAP algorithm are analyzed. We introduce three techniques, including interleaving, pointer, and parallel schemes, which can be used in timing charts to reduce memory or increase throughput. In the recent works, several timing charts of VA or MAP are presented, but there is no combined timing analysis of both algorithms. In this paper, we propose two types of triple-mode MAP/VA timing charts by complementing idle time of each other. 1