2162-8769/2013/2(1)/N1/5/$28.00 © The Electrochemical Society Multi-Layered Al2O3/HfO2/SiO2/Si3N4/SiO2 Thin Dielectrics for Charge Trap Memory Applications

Charge trap Flash memory device including HfO2 as charge trapping layer, Al2O3 as the blocking oxide, SiO2/Si3N4/SiO2 barrier engineered tunnel layer and TaN metal gate (BE-TAHOS stack) is here proposed and investigated. HfO2 and Al2O3 films are grown by atomic layer deposition and annealed at high temperature (1030◦C) in N2. Structural and chemical analyzes proved that BE-TAHOS stack has a good thermal stability after thermal treatment, as required in a standard semiconductor manufacturing process. From electrical analyzes, BE-TAHOS stack exhibited an improvement in the overall program/erase window when compared to a control sample including SiO2 layer as tunnel oxide (TAHOS stack). The memory window enhancement is due to the presence of the barrier engineered tunnel layer, exploiting the effect of a symmetric barrier composed by dielectrics with different dielectric constants and band offsets. The charge loss of the investigated BE-TAHOS stack is higher than the TAHOS control sample, and it was demonstrated that it is mainly due to the leakage through the barrier engineered tunnel oxide, which requires further optimization for an overall improvement of the memory cell