Efficient Production of Computer-Based Training in Chip Design

Chip and system design can be made more efficient and attractive by using multimedia training techniques. In our case, these techniques are employed as a supplement of classical teaching. We point out the need for the development of own computer based training material (CBT). To reduce the high expenses of multimedia productions, we propose a universal Reference Model as a framework for CBTs in many technical areas. We demonstrate the applicability of the Reference Model to a CBT system “VeriBox”, which introduces the hardware description language VERILOG and the associated logic synthesis.