COPPER ELECTRODEPOSITION ON THIN-SEED SUBSTRATES

Electrodeposition is the preferred method for building multilayer, sub-micron, Cu interconnect structures in semiconductor devices1. After dielectric patterning and barrier-layer deposition, a thin copper seed layer is deposited via PVD onto the substrate- a 200-mm or 300-mm silicon wafer- which is then immersed into an electroplating cell for electrodeposition. A highly uniform current-density distribution is required during electrodeposition to ensure uniform filling of features at all points on the substrate and to meet the thickness uniformity specifications (typically < 2%) for subsequent unit operations. A major obstacle to achieving this degree of uniformity is the terminal effect, i.e., the tendency for the plating rate to be higher near the wafer’s edge (where current is collected) than elsewhere because of the Ohmi