Low Noise CMOS Analog Front-End Circuit With an 8bit 1MS/s ADC for Silicon Sensors for Space Applications

A low power analog front-end circuit for silicon (Si) detectors has been fabricated in 0.35 µm CMOS technology. It has been designed to read out signals from large-capacitance Si detectors for incident electron energy ranging from 50 keV to 725 keV. In order to quantify electron energy, the front-end integrates a charge preamplifier, a pulse shaper, a peak detector and an event-driven analog-to-digital converter (ADC). The complete front end including the ADC dissipates 2.5 mW for a maximum electron detecting rate of 650 kHz. The charge-to-voltage gain is approximately 60 mV/fC for a charge range of 0.6 fF to 32 fF. The measured equivalent noise charge (ENC) is 3119 e − for a 40 pF detector parasitic capacitance