Abstract. The effective use of parallel computing resources to speed up algorithms in current multi-core parallel architectures remains a difficult challenge, with ease of programming playing a key role in the eventual success of various parallel architectures. In this paper we consider an al-ternative view of parallelism in the form of an ultra-wide word processor. We introduce the Ultra-Wide Word architecture and model, an exten-sion of the word-ram model that allows for constant time operations on thousands of bits in parallel. Word parallelism as exploited by the word-ram model does not suffer from the more difficult aspects of paral-lel programming, namely synchronization and concurrency. For the stan-dard word-ram algorithms, the spee...
Modern multiprocessor systems offer advanced synchronization primitives, built in hardware, to suppo...
An algorithm for the distributed computation of suffix arrays for large texts is presented. The para...
Modern microprocessor architectures have gradually incorporated support for parallelism. In the past...
We consider the predecessor problem on the ultra-wide word RAM model of computation, which extends t...
The Ultra-wide word model of computation (UWRAM) is an extension of the Word-RAM model which has an ...
Bit-parallelism permits executing several operations simultaneously over a set of bits or numbers st...
AbstractThe PRAM model of parallel computation is examined with respect to wordsize, the number of b...
To communicate with a computer in spoken language is an unattained challenge of Artificial Intellige...
AbstractWe develop a method for performing convolutions efficiently in a word RAM model of computati...
Recent advances in microelectronics have brought closer to feasibility the construction of computer...
The objective of this thesis is the unified investigation of a wide range of fundament...
AbstractWe show that a unit-cost RAM with a word length ofwbits can sortnintegers in the range 0…2w−...
Abstract. Modern multiprocessor systems offer advanced synchronization primitives, built in hardware...
In this thesis we study the limitations of data structures and how they can be overcome through care...
Multi-core processors have become the dominant processor architecture with 2, 4, and 8 cores on a ch...
Modern multiprocessor systems offer advanced synchronization primitives, built in hardware, to suppo...
An algorithm for the distributed computation of suffix arrays for large texts is presented. The para...
Modern microprocessor architectures have gradually incorporated support for parallelism. In the past...
We consider the predecessor problem on the ultra-wide word RAM model of computation, which extends t...
The Ultra-wide word model of computation (UWRAM) is an extension of the Word-RAM model which has an ...
Bit-parallelism permits executing several operations simultaneously over a set of bits or numbers st...
AbstractThe PRAM model of parallel computation is examined with respect to wordsize, the number of b...
To communicate with a computer in spoken language is an unattained challenge of Artificial Intellige...
AbstractWe develop a method for performing convolutions efficiently in a word RAM model of computati...
Recent advances in microelectronics have brought closer to feasibility the construction of computer...
The objective of this thesis is the unified investigation of a wide range of fundament...
AbstractWe show that a unit-cost RAM with a word length ofwbits can sortnintegers in the range 0…2w−...
Abstract. Modern multiprocessor systems offer advanced synchronization primitives, built in hardware...
In this thesis we study the limitations of data structures and how they can be overcome through care...
Multi-core processors have become the dominant processor architecture with 2, 4, and 8 cores on a ch...
Modern multiprocessor systems offer advanced synchronization primitives, built in hardware, to suppo...
An algorithm for the distributed computation of suffix arrays for large texts is presented. The para...
Modern microprocessor architectures have gradually incorporated support for parallelism. In the past...