Proving the correctness of programs written for multiple processors is a challenging problem, due in no small part to the weaker memory guarantees afforded by most modern architectures. In particular, the existence of store buffers means that the programmer can no longer assume that writes to different locations become visible to all processors in the same order. However, all practical architectures do provide a collection of weaker guarantees about memory consistency across processors, which enable the programmer to write provably correct programs in spite of a lack of full sequential consistency. In this work, we present a mechanization in the ACL2 theorem prover of an axiomatic weak memory model (introduced by Alglave et al. [2]). In the...
Memory models define an interface between programs written in some language and their implementation...
We present here an axiomatic framework, implemented in the Coq proof assistant, for defining weak me...
A memory model for a shared memory, multiprocessor commonly and often implicitly assumed by programm...
Writing concurrent programs with shared memory is often not trivial. Correctly synchronising the thr...
Abstract. As a pedagogical exercise in ACL2, we formalize and prove the correctness of a write inval...
We present an axiomatic framework, implemented in the Coq proof assistant, to define weak memory mod...
In order to improve performance or conserve energy, modern hardware implementations have adopted wea...
Developing correct and performant concurrent systems is a major challenge. When programming an appli...
Weak memory models formalize the inconsistent behaviors that one can expect to observe in multithrea...
Conforming to the underlying memory consistency rules is a fundamental requirement for implementing ...
Weak memory models are used to increase the performance of concurrent programs by allowing program i...
Modern processors deploy a variety of weak memory models, which for efficiency reasons may (appear t...
Multiprocessors are now dominant, but real multiprocessors do not provide the sequentially consisten...
Abstract. When verifying a concurrent program, it is usual to assume that memory is sequentially con...
Weak memory models are a consequence of the desire on part of architects to preserve all the uniproc...
Memory models define an interface between programs written in some language and their implementation...
We present here an axiomatic framework, implemented in the Coq proof assistant, for defining weak me...
A memory model for a shared memory, multiprocessor commonly and often implicitly assumed by programm...
Writing concurrent programs with shared memory is often not trivial. Correctly synchronising the thr...
Abstract. As a pedagogical exercise in ACL2, we formalize and prove the correctness of a write inval...
We present an axiomatic framework, implemented in the Coq proof assistant, to define weak memory mod...
In order to improve performance or conserve energy, modern hardware implementations have adopted wea...
Developing correct and performant concurrent systems is a major challenge. When programming an appli...
Weak memory models formalize the inconsistent behaviors that one can expect to observe in multithrea...
Conforming to the underlying memory consistency rules is a fundamental requirement for implementing ...
Weak memory models are used to increase the performance of concurrent programs by allowing program i...
Modern processors deploy a variety of weak memory models, which for efficiency reasons may (appear t...
Multiprocessors are now dominant, but real multiprocessors do not provide the sequentially consisten...
Abstract. When verifying a concurrent program, it is usual to assume that memory is sequentially con...
Weak memory models are a consequence of the desire on part of architects to preserve all the uniproc...
Memory models define an interface between programs written in some language and their implementation...
We present here an axiomatic framework, implemented in the Coq proof assistant, for defining weak me...
A memory model for a shared memory, multiprocessor commonly and often implicitly assumed by programm...