A Comparison of Error Detection between Simulation-based Validation and Model Checking

Design simulation and model checking are two alterna-tive and complementary techniques for verifying hardware designs. This paper presents a comparison between the two techniques based on their detection of design errors, per-formance, and memory use. While memory and CPU per-formance gains in simulation-based validation over model checking verification methods are to be expected, the ability of simulation-based validation in detecting errors is com-parable to that of model checking. We perform error de-tection experiments using model checking and simulation to detect errors injected into a verification benchmark suite. The results allow a quantitative comparison of simulation and model checking which can be used to understand weak-nesses of both approaches. We see that simulation-based validation is effective, and where it is not, we define test generation goals which make it effective.