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The conventional approach, widely practiced in the industry today, for testing analog circuits is to ensure that the circuit conforms to data-sheet limits on all its specifications. However, such a specification based test methodology suffers from high levels of test cost stemming from long test-times on expensive test equipment. In recent years the situation has only worsened with the advent of mixed signal systems on chip (SoC), to a point where analog circuit test cost is often found to be as much as 50 % of the total test cost in spite of analog portions occupying less than 5 % of the chip area. To alleviate the analog circuit test cost problem, a number of techniques exist in the literature that can be broadly classified as (a) fault-model based test or (b) alternate test. Fault model based test techniques direct their tests to identify faults in circuit components much like their digital circuit test counterparts resulting in a test approach that can be easily automated and relies on readily available output measurements on inexpensive test equipment. On the other hand, alternate test techniques test a circuit by building a regression model relating a few easily observable output parameters as signatures of the circuit to th